K230
- Overview
- Function Diagram
- Application Scenario
- Software SDK
- Hardware information
- Device Parameter

Kendryte ®
K230
The latest generation of SoC products in the Kendryte® series of AIoT chips
The reasoning capability under typical networks can reach 13.7 times that of K210
The K230 chip is an end-side AIoT (Artificial Intelligence of Things) chip based on the RISC-V architecture. It features high precision, low latency, high performance, ultra-low power consumption, and fast boot-up, making it widely applicable to various intelligent product scenarios such as edge-side large model multimodal access terminals, 3D structured light depth perception modules, interactive robots, open-source hardware, smart manufacturing, smart homes, smart education hardware, and many other fields.
Function Diagram

Application Scenario

Assisted Driving

Smart Network Camera

Robot Interaction

Unmanned Aerial Vehicle

Face access control

Industrial Camera

Smart Power Equipment

STEAM Education
Software SDK
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CanMV K230
Based on the K230 integrated Micropython, using the Micropython language, AI applications can be developed quickly and easily.
RT-Smart SDK
Based on the RT-Smart system, developed using C/C++ language, including tutorials, SDK instructions, application example development guide, API reference and other related materials.
Device Parameter
CPU
- CPU 1: RISC-V processor, 1.6GHz, 32KB I-cache, 32KB D-cache, 256KB L2 Cache, 128-bit RVV 1.0 extension
- CPU 0: RISC-V processor, 0.8GHz, 32KB I-cache, 32KB D-cache, 128KB L2 Cache
KPU
- Supports INT8 and INT16
- Typical network performance: Resnet 50 ≥ 85fps @INT8; Mobilenet_v2 ≥ 670fps @INT8; YoloV5S ≥ 38fps @INT8
DPU
- 3D structured light depth engine, supporting a maximum resolution of 1920*1080
VPU
- H.264 and H.265 encoder and decoder with a maximum resolution support of 4096*4096
- Encoder performance: 3840*2160@20fps
- Decoder performance: 3840*2160@40fps
- JPEG codec: supports up to 8K (8192*8192) resolution
Image Input
- Supports up to three lanes MIPI CSI (1x4lane + 1x2lane) or 3x2lane
Display Output
- 1 lane MIPI DSI, 1x4 lane or 1x2 lane
- Maximum resolution 1920*1080@60fps
On-chip Interfaces
- 5 x UART
- 5 x I2C
- 6 x PWM
- 64 x GPIO + 8 x PMU GPIO
- 2 x USB 2.0 OTG
- 2 x SDxC: SD3.01, eMMC 5.0
- 3 x SPI: 1 x OSPI + 2 x QSPI
- WDT / RTC / Timer